subckt AND A B Out Vdd Vss
	P1 (net1 A Vdd Vdd)
	P2 (net1 B Vdd Vdd)
	N1 (net1 A net2 Vss)
	N2 (net2 B Vss Vss)
	I1 (Vdd Vss net1 Out) ccInverter
ends AND

subckt OR A B Out Vdd Vss
	P1 (net1 A Vdd Vdd)
	P2 (net2 B net1 Vdd)
	N1 (net2 A Vss Vss)
	N2 (net2 B Vss Vss)
	I1 (Vdd Vss net2 Out) ccInverter
ends OR

subckt 2_1mux A B S Out Vdd Vss
	I1 (Vdd Vss S Sbar) ccInverter
	A1 (Sbar A and1 Vdd Vss) AND
	A2 (S B and2 Vdd Vss) AND
	O1 (and1 and2 Out Vdd Vss) OR
ends 2_1mux
 